1. Field of the Invention
The present invention relates to a CPU (Central Processing Unit) runaway determination circuit and a CPU runaway determination method, provided in a computer-embedded device such as a microcomputer board incorporated in a home-use appliance.
2. Description of the Related Art
A control circuit of the computer-embedded device is provided with a watchdog timer. The watchdog timer is arranged to generate a reset signal when the CPU has entered a runaway state in a logic circuit including the CPU, and to reboot the CPU thereby preventing runaway of the CPU. Specifically, when a clear signal is input from the CPU to the watchdog timer, the watchdog timer resets a counter. When the clear signal from the CPU is stopped and a count value reaches a predetermined value, the CPU is determined to have entered the runaway state. Then, the watchdog timer outputs a reset signal to the CPU.
As a specific example of the watchdog timer, there has been proposed a CPU runaway determination circuit in which a delay circuit which operates at a rising edge of a power VC is provided at an input port of a CPU. From a logic value of the state of the input port immediately after the CPU is reset, a determination is made as to whether a start is an initial start by activation of power or a restart due to the runaway (JP-U-5-87644).
Further, in connection with an information processor in which a CPU reads a program stored in ROM (Read-Only Memory) or RAM (Random Access Memory) and a plurality of program-processing sections run the program, there has been proposed a watchdog timer for specifying in which of the program-processing sections a runaway has occurred. Specifically, the watchdog timer is provided with a status register having storage areas assigned to first and second program-processing sections which are subjected to monitoring. Upon detection of any of the program-processing sections in which the runaway has occurred, the watchdog timer writes a result of detection into a corresponding storage area within the status register. Upon receipt of a notice of detection of a runaway from the watchdog timer, the control section makes a reference to the storage areas of the status register, thereby specifying the program-processing section in which the runaway has occurred (JP-A-2005-92430).
However, when the delay circuit is provided at the input port of the watchdog timer in JP-U-5-87644, the CPU determines that the start is a restart due to the runaway. In a case where a problem still exists in a program or hardware even when the CPU is initialized by the reset signal from the watchdog timer, there is a risk that the runaway occurs repeatedly. Moreover, when an element such as memory is broken, the runaway immediately occurs even when the CPU is rebooted.
Moreover, JP-A-2005-92430, when the watchdog timer has detected the runaway of the program-processing section, the control section can make a reference to the storage areas of the status register, to thus specify the program-processing section in which the runaway has occurred and be able to appropriately handle the program-processing section. However, latch circuits must be provided as many as the program-processing sections executed by the control section. Therefore, when the number of programs to be executed by the control section increases, the circuit configuration becomes more complicated and intricate, thereby increasing the number of components and eventually increasing a manufacturing cost.
There are many cases where even in a control circuit of a computer-embedded device, a plurality of tasks is executed as a result of a logic circuit including a CPU having recently become of higher performance and of higher functionality. In this case, it is required to specify in which task (process or thread) a runaway has occurred, and reset the system while avoiding the task in which the runaway has occurred.